SSTL

  • Guildford, UK
Jan 22, 2022
SSTL Guildford, UK
The Optical Team seeks a dynamic, organised and proactive Optical Design Engineer with high standards and technical capabilities as a key source of optical design and analysis expertise for the next generation of SSTL’s Optical Payloads. Development of optical designs for space-borne instrumentation in conjunction with one or more multidisciplinary teams, being a technical point of contact for optical design and analysis. Evolution of optical design and analysis against project requirements from concept through to manufacture, system integration and verification, including build files and non-compliance analysis. Advise on risk, programmatic and budgetary issues with regard to proposed designs Proactively provide support to project teams with regard to optical design, analysis and build throughout the project lifecycle. Provide clear documentation of optical design, analysis, alignment and testing requirements, together with identification of associated risks and trade-offs....
Jan 22, 2022
SSTL Guildford, UK
The role involves design of digital hardware including PCB, FPGA level design and also includes embedded software design on target microcontrollers. High Speed Digital Hardware Design Schematic capture board level design Embedded software development of 8/16/32Bit Microcontrollers Design, implementation and verification of FPGA’s in VHDL Hardware Debugging and board bring up Responsible for Manufacture, Test and Delivery of Existing Hardware Designs Generation of appropriate design documentation Work closely in a core project team Involvement in SSTL peer reviews Responsible for the delivery of all aspects of the defined/delegated package of work which includes, Technical Solution, Budget and Schedule Several years’ experience of digital board level design. Experience of analogue circuit design desirable but not essential Experience of system level debug and test Knowledge of Work Package Management and Matrix Management structure preferable. Knowledge of FPGA design in VHDL Good...